KONRAD Frederic
Builds for 2 pipelines failed

add missing test registers.

This adds the registers but doesn't implement them.
This is just to remove the warning when the driver access it.

Signed-off-by: KONRAD Frederic <fred.konrad@greensocs.com>

Changes:
  V1 -> V2
  * Add all missing registers.
... ... @@ -174,6 +174,11 @@ PL190::PL190(sc_module_name name):
PL190_r("VECTCNTL15", "", 0x23C, 0, ~0);
r[VECTCNTL15].br.create("E", 5, 5);
r[VECTCNTL15].br.create("IntSource", 0, 4);
PL190_r("VICITCR", "", 0x300, 0, 1);
PL190_r("VICITIP1", "", 0x304, 0, 0);
PL190_r("VICITIP2", "", 0x308, 0, 0);
PL190_r("VICITOP1", "", 0x30C, 0, 0);
PL190_r("VICITOP2", "", 0x310, 0, 0);
PL190_r("PeriphID0", "", 0xFE0, 0x90, 0);
PL190_r("PeriphID1", "", 0xFE4, 0x11, 0);
PL190_r("PeriphID2", "", 0xFE8, 0x04, 0);
... ...