KONRAD Frederic

Initial commit importing all the files.

This is the initial commit and import of all the file from the SVN.

Signed-off-by: KONRAD Frederic <fred.konrad@greensocs.com>
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// LICENSETEXT
//
// Copyright (C) 2007-2008 : GreenSocs Ltd
// http://www.greensocs.com/ , email: info@greensocs.com
//
// Developed by :
//
// Christian Schroeder, Wolfgang Klingauf
// Technical University of Braunschweig, Dept. E.I.S.
// http://www.eis.cs.tu-bs.de
//
//
// The contents of this file are subject to the licensing terms specified
// in the file LICENSE. Please consult this file for restrictions and
// limitations that may apply.
//
// ENDLICENSETEXT
#ifndef __PCIeRootComplex_h__
#define __PCIeRootComplex_h__
#include <systemc>
#include "platform_globals.h"
#include "pciesocket/transport/PCIe.h"
#include "pciesocket/api/PCIeAPI.h"
#include "pciesocket/transport/PCIeRouter.h"
namespace gs {
namespace PCIe {
/**
* This is a PCIe Root Complex prepared to be implemented by the user
*
* The user has to implement the method
* void down_to_router_port_b_transact(PCIeTransactionHandle t);
* to handle incoming TLPs.
*/
class PCIeRootComplex
: public PCIeRouter // must be public for API checks,
{
/// Connector handles incoming blocking and non-blocking transactions from Upstream router port
/**
* Wrapper class for slave PEQ output IF
* Non-blocking is not supported.
* Blocking forwarded to Root Complex.
*/
class Connector
: public payload_event_queue_output_if<PCIeAPI::accessHandle>,
//public tlm_b_if<PCIeTransactionHandle>,
public PCIe_recv_if {
public:
Connector(PCIeRootComplex* boss):m_boss(boss) { }
virtual void notify(PCIeAPI::accessHandle& tp) {
SC_REPORT_WARNING("PCIeRouter Downstream connector", "Non-blocking communication is not supported!");
}
virtual void b_transact(PCIeAPI::accessHandle t) {
m_boss->down_to_router_port_b_transact(t);
}
private:
PCIeRootComplex* m_boss;
};
public:
SC_HAS_PROCESS(PCIeRootComplex);
// Default Constructor
PCIeRootComplex(sc_core::sc_module_name name_) :
PCIeRouter(name_),//sc_module(name_),
down_to_router_port("internal_RootComplex_to_router_port", &down_to_router_port_connector),
down_to_router_port_connector(this)
{
PCIeDEBUG("Constructor PCIeRootComplex " << name());
// bind PEQ output port (not supported notify)
//down_to_router_port.peq.out_port(down_to_router_port_connector);
// bind blocking
//down_to_router_port.bind_b_if(down_to_router_port_connector);
// TODO: how to remmove () ambigiousness?
static_cast<PCIeBidirectionalPort*>(&down_to_router_port)->operator()(upstream_port);
//SC_THREAD(main_action);
}
/// Constructor with user given bus number counter
PCIeRootComplex(sc_core::sc_module_name name_, int& bus_no_counter) :
PCIeRouter(name_, bus_no_counter),//sc_module(name_),
down_to_router_port("internal_RootComplex_to_router_port", &down_to_router_port_connector),
down_to_router_port_connector(this)
{
PCIeDEBUG("Constructor PCIeRootComplex " << name());
// bind PEQ output port (not supported notify)
//down_to_router_port.peq.out_port(down_to_router_port_connector);
// bind blocking
//down_to_router_port.bind_b_if(down_to_router_port_connector);
// TODO: how to remmove () ambigiousness?
static_cast<PCIeBidirectionalPort*>(&down_to_router_port)->operator()(upstream_port);
//SC_THREAD(main_action);
}
//void main_action();
protected:
/// Blocking PV incoming transaction
void down_to_router_port_b_transact(PCIeAPI::accessHandle t);
/// Internal port to the Switch's Upstream Port
PCIeAPI/*PCIeBidirectionalPort*/ down_to_router_port;
protected:
/// Conector to handle incoming transactions from router's Upstream Port
Connector down_to_router_port_connector;
};
} // end namespace PCIe
} // end namespace gs
#endif
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% (c) GreenSocs Ltd
% author: Christian Schroeder <schroeder@eis.cs.tu-bs.de>
\section{Requirements for the GreenBus Configuration Framework}
\label{requirements}
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PCIe_Users_Guide.tex
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% (c) GreenSocs Ltd
% author: Christian Schroeder <schroeder@eis.cs.tu-bs.de>
\chapter{Introduction}
This is the User's Guide of the PCI Express (PCIe) implementation for TLM2.0 named {\em PCIeSocket}. The implementation uses GSGPSockets which are TLM2.0 sockets (GreenSockets) with a mostly GreenBus-compatible API. This documentation expects the reader to be familiar with SystemC and - for deeper understanding - GSGPSocket / formerly GreenBus. GreenSocket is the universal TLM2.0 bus implementation by GreenSocs with GSGPSocket adding the GreenBus compatible API with three-phase-protocol.
The PCIeSocket PCIe implementation allows the user to model a PCIe topology at the programmer's view (PV) abstraction level.
The documentation is related to the GSGPSocket 1.x.x version. % TODO: update
\section{Terms, Acronyms, Documentation and Implementation Conventions}
\begin{tabular}{lp{13cm}}
\textsf{PCIe} & PCI Express \\
\textsf{TLP} Transaction & Layer Packet which is modeled with a PCIe Transaction \\
\textsf{PCIe Transaction} & One PCIe TLP or several TLPs (correlated Request, Completions) \\
\textsf{Generic device} & A generic device is a device (or SystemC module) using the standard GSGPSocket API without any further API specialization (like PCIe). \\
\textsf{Root Complex} & A Root Complex is a device with an internal PCIe Switch sitting on top of the PCIe hierarchy. \\
\end{tabular}
\section{Namespace}
The implementation of all not-user classes according PCIe are located in the namespace {\sffamily gs::PCIe}.
\Note{Legacy Note}{Namespace}{If you need to use the GreenBus PCIe namespace {\sffamily tlm::PCIe} include the header file \Datei{pcie\_namespace\_compatibility.h}}
\section{PCI Express}
This PCIe implementation is based on the \emph{PCI Express Base Specification Revision 2.0} and related documents.
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PCIe_Users_Guide.tex
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% (c) GreenSocs Ltd
% author: Christian Schroeder <schroeder@eis.cs.tu-bs.de>
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pdftitle={PCIeSocket PCI Express User's Guide},
pdfsubject={User's Guide for the PCIe Implementation for TLM2.0 based on the GreenBus Implementation},
pdfauthor={Christian Schroeder, Technical University of Braunschweig, Dept. E.I.S. and GreenSocs Ltd},
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\author{Copyright GreenSocs Ltd 2007-2009\\ \\Developed by\\Christian Schr\"oder and Wolfgang Klingauf, Robert G\"unzel\\Technical University of Braunschweig, Dept. E.I.S.}
\title{PCIeSocket PCI Express User's Guide
\\ (PCIeSocket v.2.0.1)
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else
SCV_INCLUDE ?= /cad/tools/systemc-scv/include
SCV_LIB ?= /cad/tools/systemc-scv/lib-$(TARGET_ARCH)
endif
## Static or dynamic cast class hierarchy
#ifdef STATIC
## Note: dynamic cast variant of the generic protocol is deprecated. So always use static casts.
STATIC_DEFINE=-DUSE_STATIC_CASTS
#endif
## Generic Protocol Extensions
ifdef EXTENSION
EXT_TR_DEFINE=-DEXTENDED_TRANSACTION=$(EXTENSION)
endif
DEFFLAGS = $(EXT_TR_DEFINE) $(STATIC_DEFINE) -DSC_INCLUDE_DYNAMIC_PROCESSES
## muldefs should be avoided in the source code, not by the linker
##LDFLAGS = -Wl,-zmuldefs
LDFLAGS =
INCDIR = -I$(GS_CONTROL_DIR) -I$(BOOST) -I$(GREENBUS_DIR) -I$(GREENSOCKET_DIR) -I$(GSGPSOCKET_DIR) \
-I$(TLM2_DIR) -I$(DUST_DIR) -I$(HPC_DIR) -I$(PCIESOCKET_DIR) -I$(GREENPARTS_DIR) -I$(SCV_INCLUDE) \
-I. -I.. -I$(SYSTEMC)/include -I$(LUA_DIR)/include $(GREENREG_INCDIRS)
LIBDIR = -L$(DUST_DIR) -L$(SCV_LIB) -L. -L.. -L$(SYSTEMC)/lib-$(TARGET_ARCH) -L$(LUA_DIR)/lib-$(TARGET_ARCH) -L$(GREENREG_LIB_DIR)
## use this line if you want to link against dust
#LIBS = -lscv -ldust -lsystemc -lm $(EXTRA_LIBS)
## use this line if you dont need dust
## here may be needed to write -lscv at the beginning - which also may cause problems!
LIBS = -lsystemc -lm $(EXTRA_LIBS) -lgreenreg
EXE = $(MODULE).x
.SUFFIXES: .cc .cpp .o .x
$(EXE): $(OBJS) $(SYSTEMC)/lib-$(TARGET_ARCH)/libsystemc.a
$(CC) $(CFLAGS) $(SCCFLAG) $(DEFFLAGS) $(LDFLAGS) $(INCDIR) $(LIBDIR) -o $@ $(OBJS) $(LIBS) 2>&1 | c++filt
# strip $(EXE)
.cpp.o:
$(CC) $(CFLAGS) $(SCCFLAG) $(DEFFLAGS) $(INCDIR) -c $< -o $@
.cc.o:
$(CC) $(CFLAGS) $(SCCFLAG) $(DEFFLAGS) $(INCDIR) -c $< -o $@
clean::
rm -f $(OBJS) *~ $(EXE) core